1. Field of the Invention
The present invention relates to an integrated circuit apparatus in which the operation of circuits when not used is appropriately stopped to reduce the adverse influence of noise.
2. Description of Related Art
FIG. 24 is a diagram showing the configuration of a microcomputer representing a conventional integrated circuit apparatus. In FIG. 24, 1 indicates an external electric power supply source, and 2 indicates a microcomputer representing a conventional integrated circuit apparatus. 3 indicates an electric power supply terminal (hereinafter, called a Vcc terminal) for electrically connecting the microcomputer 2 with the external electric power supply source 1. 4 indicates a ground (GND) level supply terminal (hereinafter, called a Vss terminal) for electrically connecting the microcomputer 2 with an external ground electric level (hereinafter, called a GND level). 16 indicates a control circuit such as a central processing unit (CPU) or a bus interface unit (BIU) or an interrupt control circuit (hereinafter, called a control circuit) such as an interface control unit (ICU) or a direct memory access controller (DMAC). 17 indicates a pre-decoder (or a decoder) for decoding an address of a to-be-controlled circuit output from the control circuit 16, setting a pre-decode signal to an active state to indicate that the to-be-controlled circuit is controlled by the control circuit 16, setting each of pre-decode signals of circuits other than the to-be-controlled circuit to an inactive state and outputting the pre-decode signals to a plurality of supply lines of the pre-decode signals. 18 indicates a memory circuit (hereinafter, called a memory) such as a read only memory (ROM), a random access memory (RAM) or a flash memory. 19 indicates a periphery function circuit (hereinafter, called a peripheral circuit). 20 indicates a clock generator for outputting an operation clock signal to each circuit. Each of reference numerals 6 to 15 indicates a buffer circuit (hereinafter, called a port circuit) for a port, a port latch or an input/output drive. Each of reference numerals 21 to 30 indicates a capacitor built-in the microcomputer 2. Solid lines and solid arrows indicate supply lines of the operation clock signals, and the supply lines are arranged so as to surround the circuits 16 to 20. Dotted lines and dotted arrows indicate the supply lines of the pre-decode signals arranged so as to surround the circuits 16 to 20. Also, though a data bus, an address bus and a control bus are arranged so as to surround the circuits 16 to 20, the data bus, the address bus and the control bus are omitted in FIG. 24 and other drawings to simplify the description of the microcomputer 2. Thick solid lines indicate power supply lines through which the electric power of the external electric power supply source 1 is supplied to each circuit. The thick dotted lines indicate GND level supply lines through which each circuit is set to the GND level.
Also, because the circuits 16 to 19 are arranged in an area surrounded by the supply lines of the operation clock signals, the supply lines of the pre-decode signals and the above buses, the circuits 16 to 19 are called internal circuits. The port circuits 6, 7, 14 and 15 are called left-side port circuits because the port circuits 6, 7, 14 and 15 are placed on the left side of the microcomputer 2. The port circuits 8 and 9 are called upper-side port circuits because the port circuits 8 and 9 are placed on the upper side of the microcomputer 2. The port circuits 10 and 11 are called right-side port circuits because the port circuits 10 and 11 are placed on the right side of the microcomputer 2. The port circuits 12 and 13 are called lower-side port circuits because the port circuits 12 and 13 are placed on the lower side of the microcomputer 2.
In cases where the circuits of the microcomputer 2 are replaced with equivalent circuits of the microcomputer 2, the connection between the group of internal circuits 16 to 19 and the group of power supply lines is intentionally designed to supply the electric power to the internal circuits 16 to 19 through equivalent resistances, equivalent inductances and equivalent capacitances parasitically existing in the power supply lines, the port circuits 6 to 15, the capacitors 21 to 30 and other circuits. This design is performed by considering noise generated in the microcomputer 2 according to electromagnetic interference and electromagnetic smog (EMI/EMS). Because of the above design of the power supply lines, an LC filter effect can be obtained in the power supply lines extending from the Vcc terminal 3 to the internal circuits 16 to 19 through the port circuits 6 to 15. Therefore, the inputting of external noise from the Vcc terminal 3 to the microcomputer 2 and the outputting of internal noise generated in the internal circuits 16 to 19 to the outside of the microcomputer 2 through the Vcc terminal 3 can be prevented.
The LC filter effect in the power supply lines extending from the Vcc terminal 3 to the internal circuits 16 to 19 through the port circuits 6 to 15 is described in detail with reference to FIG. 25 and FIG. 26A and FIG. 26B. FIG. 25 shows an equivalent circuit of the microcomputer 2 shown in FIG. 24. In FIG. 25, reference numerals 32 to 41 indicate a plurality of function blocks arranged in the port circuits 6 to 15, and the function blocks 32 to 41 are simultaneously operated when one operation clock signal and/or an electric power are supplied to the function blocks 32 to 41. Also, a specific circuit element required to make each of the port circuits 6 to 15 have a function of the port circuit is arranged in the function block of the port circuit. Reference numerals 42 to 51 indicate equivalent inductances parasitically existing in the power supply lines of the port circuits 6 to 15, and reference numerals 52 to 61 indicate equivalent capacitances parasitically existing in the power supply lines of the port circuits 6 to 15. The same constituent elements as those shown in FIG. 24 are indicated by the same reference numerals as those indicating the constituent elements in FIG. 24, and the description of the same constituent elements as those shown in FIG. 24 is omitted.
A general cause of electric power source noise generated in the microcomputer 2 shown in FIG. 25 is described.
FIG. 26A is an explanatory diagram showing a signal transmitting through an inverter circuit in cases where an operation frequency of the inverter circuit is sufficiently low, and FIG. 26B is an explanatory diagram showing a signal transmitting through an inverter circuit in cases where an operation frequency of the inverter circuit is high. In FIG. 26B, a reference numeral L1indicates a parasitic inductance of the power supply line, a reference numeral L2indicates a parasitic inductance of the GND supply line, a reference numeral L3indicates a parasitic inductance of a signal line, a reference numeral C1indicates a parasitic capacitance in an area between the electric power source and the GND level supply source, and a reference numeral C2indicates a parasitic capacitance in an area between the signal line and the GND level supply source.
As shown in FIG. 26A, in cases where an operation frequency of the inverter circuit is sufficiently low, a level of a signal input to the inverter circuit is sharply changed. In cases where the change of the input signal is sharp, a level of an output signal is not made uncertain, no penetration current flows, so that no electric power source noise occurs.
In contrast, as shown in FIG. 26B, in cases where an operation frequency of the inverter circuit is high, the parasitic inductance L3of the signal line and the parasitic capacitance C2in the area between the signal line and the GND level supply source cannot be ignored. Therefore, a level of a signal input to the inverter circuit is not sharply changed, and a state, in which the input signal is set to an intermediate level, occurs. During this state, a p-channel transistor and an n-channel transistor of the converter circuit are respectively set to a weakly xe2x80x9conxe2x80x9d state to make a level of an output signal uncertain, so that a penetration current flows from the electric power supply source 1 to the GND level supply source.
In case of the high operation frequency, the parasitic inductance L1and L2and the parasitic capacitance C1exist in the electric power supply source and the GND supply source in the same manner as those L3and C2existing in the signal line. Therefore, in cases where the size of the transistors of the inverter circuit is sufficiently small and current drive performances of the transistors are sufficiently low, even though the penetration current flows, because of a choke coil effect obtained from the parasitic inductance L1of the power supply line and the parasitic inductance L2of the GND level supply line and a smoothing capacitor effect obtained from the parasitic capacitance C1between the electric power source and the GND level supply source, the penetration current has no adverse influence on the operation of the converter circuit in the practical use.
However, in cases where the transistors of the inverter circuit have large sizes and high current drive performances, the penetration current flowing from the electric power supply source to the GND level supply source becomes large, so that the adverse influence of the penetration current cannot be suppressed by the choke coil effect and the smoothing capacitor effect. In this case, the penetration current makes the electric power supply voltage uncertain (for example, a voltage decrease for a moment), so that electric power source noise is generated.
Returning to the description of the equivalent circuit shown in FIG. 25, the parasitic inductance L1of the power supply line and the parasitic inductance L2of the GND supply line correspond to the equivalent inductances 42 to 51, the parasitic capacitance C1between the electric power supply source 1 and the GND supply source corresponds to the equivalent capacitances 52 to 61, the parasitic inductance L3of the signal line and the parasitic capacitance C2between the signal line and the GND level supply source exist in the function blocks 32 to 41. In case of the port circuit 6 as an example, in cases where a transistor having a large size and a high current drive performance is arranged in the function block 32, a penetration current flows from the electric power supply source 1 to the GND level supply source through the function block 32. A peak value of the penetration current becomes high as the number of transistors having large sizes and high current drive performances is increased.
To prevent the adverse influence of the penetration current, the port circuit 6 is connected with the capacitor 21 in a specific area of the power supply line, in which only the equivalent resistance, the equivalent inductance 42 and the equivalent capacitance 52 of the power supply line parasitically exist. This is achieved by designing a specific arrangement of the power supply line between the group of the internal circuits 16 to 19 and the Vcc terminal 3, to make the capacitor 21 electrically influence on the equivalent inductance 42 and the equivalent capacitance 52. Therefore, the group of the capacitance of the capacitor 21, the equivalent inductance 42 and the equivalent capacitance 52 parasitically existing in the port circuit 6 function as an LC filter. That is, the equivalent inductance 42 parasitically existing in the port circuit 6 functions as a choke coil, and the composition of the capacitance of the capacitor 21 and the equivalent capacitance 52 functions as a smoothing capacitor. In other words, the equivalent capacitance 52 is too small to make a capacitor of the equivalent capacitance 52 function as a smoothing capacitor, so that the capacitor 21 is added to the port circuit 6.
In the microcomputer 2 in which the power supply lines are designed as shown in FIG. 24 and FIG. 25, electric power source noise generated in the internal circuits 16 to 19, the upper-side port circuits 8 and 9, the right-side port circuits 10 and 11 and the lower-side port circuits 12 and 13 are attenuated in the microcomputer 2 because of the LC filter effect, so that there is little possibility that the electric power source noise is output from the Vcc terminal 3 to the outside. Therefore, in cases where the microcomputer 2 is arranged with another device on a board to supply the same electric power as that supplied to the microcomputer 2 to the device, electric power source noise is not output from the microcomputer 2 to avoid erroneous operation. Therefore a board not making the device be erroneously operated can be easily designed. Also, even though electric power source noise generated in the device is input to the microcomputer 2 through the Vcc terminal 3, the electric power source noise is attenuated in the microcomputer 2 because of the LC filter effect. Therefore, no electric power source noise is input to the internal circuits 16 to 19, the upper-side port circuits 8 and 9, the right-side port circuits 10 and 11 and the lower-side port circuits 12 and 13.
In addition to the above-described noise attenuation method, there is a noise avoiding method. In this method, operations of all circuits respectively not used are stopped to avoid noise inevitably generated in the operation of each circuit. However, the noise attenuation method, in which the capacitors 21 to 30 are appropriately added by designing the specific arrangement of the power supply lines between the group of the internal circuits 16 to 19 and the Vcc terminal 3, is superior to the noise avoiding method in which operations of all circuits respectively not used are stopped. More precisely, in cases where a microcomputer, from which no noise is output to the outside, is designed, a noise avoiding method is available. However, in the noise avoiding method, in cases where a noise is input from the outside to the microcomputer, the noise cannot be attenuated in the microcomputer, so that an erroneous operation resistance to noise input from the outside is not improved. Also, in cases where a circuit, which is operated in a first time-period and is not used in a second time-period, exists in the microcomputer, the operation stop and the operation start are alternately repeated in the circuit. In this case, a possibility that the circuit is erroneously operated at an operation start time is heightened as the operation frequency of the circuit is heightened, and the erroneous operation resistance of the microcomputer is degraded to a low degree by the erroneous operation of the circuit.
In contrast, in the noise attenuation method, not only the microcomputer, from which no noise is output to the outside, can be obtained, but also the microcomputer, in which the erroneous operation resistance to noise is improved, can be obtained. Also, because only noise is attenuated in the microcomputer in a state that all circuits of the microcomputer are fundamentally operated, a possibility that each circuit is erroneously operated at an operation start time can be reduced even though the operation frequency of the circuit is high.
However, because the conventional integrated circuit apparatus represented by the microcomputer 2 has the above configuration, there is a problem that noise is generated because of the port circuits 6 and 15 most-adjacent to the Vcc terminal 3 or because of a group of the port circuits 6 and 15 and the port circuits 7 and 14 arranged in the periphery of the port circuits 6 and 15.
This problem is described in detail. Though a noise reduction in the conventional integrated circuit apparatus is performed in some degree by appropriately adding the capacitors 21 to 30 while designing the specific arrangement of the power supply lines between the group of the internal circuits 16 to 19 and the Vcc terminal 3, the noise reduction is not sufficient. Research and analysis of the cause of noise generation by the present inventor has shown that the reduction of noise transmitting through the power supply line (or electric power source noise input/output through the Vcc terminal 3) is not sufficient in the conventional integrated circuit apparatus. In particular, the inventor has shown that noise is generated because of one or more circuits most-adjacent to the Vcc terminal 3 (for example, the left-side port circuits 6 and 15 (relating to the function blocks 32 and 41) in the example shown in FIG. 24) or because of the group of the port circuits 6 and 15 and the port circuits 7 and 14 arranged in the periphery of the port circuits 6 and 15.
In cases where the function blocks 32 and 41 of the port circuits 6 and 15 are, for example, considered, the LC filter effect based on the capacitors 21 and 30 arranged in the microcomputer 2 does not effectively function. That is, because only the equivalent resistance, the equivalent inductance and the equivalent capacitance parasitically exist in the power supply line between the Vcc terminal 3 and the group of the port circuits 6 and 15, no element, which attenuates noise generated in the function blocks 32 and 41 of the port circuits 6 and 15, is arranged in the microcomputer 2, so that the noise is output from the Vcc terminal 3 to the outside. Also, the inputting of external noise from the Vcc terminal 3 to the function blocks 32 and 41 cannot be avoided. Therefore, an erroneous operation resistance of the port circuits 6 and 15 to noise mainly determines the erroneous operation resistance of the microcomputer 2 to noise.
In addition, another problem in the port circuits 6 and 15 is described with reference to FIG. 27A and FIG. 27B.
FIG. 27A is an explanatory diagram showing a positional relationship between a group of external terminals (or pins) arranged on a substrate and a group of terminal pads of a circuit of the conventional integrated circuit apparatus in cases where a distance between each external terminal and the corresponding terminal pad is optimized, and FIG. 27B is an explanatory diagram showing a positional relationship between the group of external terminals (or pins) and the group of terminal pads in cases where a distance between each external terminal and the corresponding terminal pad is lengthened.
In FIG. 27A and FIG. 27B, a reference numeral A indicates an external terminal (hereinafter, called a pin) used to electrically connect a circuit of the conventional integrated circuit apparatus with an external device, a reference numeral B indicates a terminal pad of the circuit, a reference numeral xe2x80x9caxe2x80x9d indicates a pin distance between the pins A adjacent to each other, each of reference numerals xe2x80x9cbxe2x80x9d and xe2x80x9ccxe2x80x9d indicates a terminal pad distance between the terminal pads B adjacent to each other, each of reference numerals W1 and W2 indicates a gold line connecting the pin A and the corresponding terminal pad B.
As shown in FIG. 27A, each circuit of the conventional integrated circuit apparatus is arranged on a substrate on which a plurality of pins A are generally arranged to electrically connect the substrate with external devices, and gold lines W1 are arranged to electrically connect a plurality of terminal pads B of the circuit and the pins A. Thereafter, the molding of a resin material is performed to shield the circuits arranged on the substrate from its peripheral area. In this case, when the resin material is molded on the gold line W1 connecting the terminal pad B and the pin A, the gold line W1 is put under a stress of the resin material according to environmental conditions such as temperature. Therefore, as shown in FIG. 27B, in cases where the terminal pad B and the pin A are arranged to make the distance between the terminal pad B and the pin A longer than an optimum distance or in cases where the gold line W2 is arranged in a slant direction, there is a possibility that the gold line W2 is disconnected because of the stress of the resin material. To avoid the disconnection of the gold line, as shown in FIG. 27A, it is required to set the physical distance between the terminal pad B and the pin A to be as short as possible.
Also, the pin distance a between the pins A is prescribed and fixed to a constant value, and a space surrounding each port circuit most-adjacent to the Vcc terminal 3 is occupied by the Vcc terminal 3 to reduce a free space surrounding the port circuit. Therefore, in cases where the port circuits 6 and 15 most-adjacent to the Vcc terminal 3 are arranged so as to set the physical distance between each terminal pad B relating to the port circuits 6 and 15 and the corresponding pin A to be as short as possible, a physical space used to arrange each of the capacitors 21 and 30 relating to the port circuits 6 and 15 is reduced because of the existence of the Vcc terminal 3. To sufficiently remove the adverse influence of noise on a port circuit, it is required to arrange a capacitor having a sufficiently large capacitance, and a large physical space is required to arrange the capacitor having a sufficiently large capacitance (a physical size of a capacitor becomes large as the capacitance of the capacitor is increased). Though a capacitance of a capacitor (for example, the capacitor 22 or 29) can be increased in cases where the capacitor is placed on a corner of the substrate on which no pin is arranged, because each of the port circuits 6 and 15 is not arranged on the corner of the substrate, it is difficult to create a sufficient space, which is equivalent to that given to the capacitor 22 or 29, to each of the capacitors 21 and 30. Therefore, the capacitances of the capacitors 21 and 30 are reduced, so that the adverse influence of noise on each of the port circuits 7 and 14 cannot be sufficiently removed.
The influence of noise based on the insufficient capacitances of the capacitors 21 and 30 is described by reference to the equivalent circuit shown in FIG. 25. Because each of the capacitors 21 and 30 has an insufficient capacitance, the LC filter effect is not sufficient in the peripheries of the capacitors 21 and 30. Therefore, noise generated in the function blocks 33 and 40 of the port circuits 7 and 14 is not sufficiently attenuated in the peripheries of the capacitors 21 and 30, and the noise is output from the Vcc terminal 3 to the outside. Also, external noise input from the Vcc terminal 3 is not sufficiently attenuated in the peripheries of the capacitors 21 and 30 before the external noise reaches the function blocks 33 and 40 of the port circuits 7 and 14, so that it is inevitable that the external noise is input to the function blocks 33 and 40. Therefore, a weak erroneous operation resistance of the port circuits 7 and 14 to the external noise determines the erroneous operation resistance of the microcomputer 2 in addition to that of the port circuits 6 and 15.
An object of the present invention is to provide, with due consideration to the drawbacks of the conventional semiconductor circuit apparatus, a semiconductor circuit apparatus in which noise is reduced by appropriately stopping an operation of a circuit connected with a power supply line in cases when the circuit is out of use.
The object is achieved by the provision of a semiconductor circuit apparatus, in which an electric power supply terminal electrically connected with an external electric power source is arranged to supply an electric power to circuits of the semiconductor circuit apparatus, comprising:
a most-adjacent-to-electric-power-supply-terminal circuit connected with the electric power supply terminal through a power supply line through which the most-adjacent-to-electric-power-supply-terminal circuit is electrically most-adjacent to the electric power supply terminal among the circuits respectively connected with the electric power supply terminal through a power supply line; and
operation stopping means for stopping an operation of the most-adjacent-to-electric-power-supply-terminal circuit in cases where the most-adjacent-to-electric-power-supply-terminal circuit is not used.
In the above configuration, there is a possibility that noise is generated in any circuit of the semiconductor circuit apparatus during the operation of the circuit and is output to the outside through the electric power supply terminal. Also, there is a possibility that external noise is input to any circuit of the semiconductor circuit apparatus through the electric power supply terminal to erroneously operate the circuit when the circuit is operated. Because the most-adjacent-to-electric-power-supply-terminal circuit is electrically most-adjacent to the electric power supply terminal, a possibility that the noise generated in the most-adjacent-to-electric-power-supply-terminal circuit adversely influences on other components of the outside is high. Also, a possibility that the external noise adversely influences on the most-adjacent-to-electric-power-supply-terminal circuit is high. However, in the present invention, because the operation of the most-adjacent-to-electric-power-supply-terminal circuit is stopped by the operation stopping means in cases where the most-adjacent-to-electric-power-supply-terminal circuit is not used, the adverse influence of the noise generated in the most-adjacent-to-electric-power-supply-terminal circuit on other components of the outside and the adverse influence of the external noise on the most-adjacent-to-electric-power-supply-terminal circuit can be reduced.
Accordingly, an erroneous operation resistance to the external noise in the integrated circuit apparatus can be improved, and the number of noises generated in the integrated circuit apparatus can be reduced.
It is preferred that the integrated circuit apparatus further comprises a group of most-adjacent-to-electric-power-supply-terminal circuits composed of the most-adjacent-to-electric-power-supply-terminal circuit and one or more first circuits to which an operation signal or an operation source supplied to the most-adjacent-to-electric-power-supply-terminal circuit is supplied to operate the specific circuits with the most-adjacent-to-electric-power-supply-terminal circuit, wherein an operation of the group of most-adjacent-to-electric-power-supply-terminal circuits or the operation of the most-adjacent-to-electric-power-supply-terminal circuit is stopped by the operation stopping means in cases where the most-adjacent-to-electric-power-supply-terminal circuit is not used.
In the above configuration, because the operation of the group of most-adjacent-to-electric-power-supply-terminal circuits including the most-adjacent-to-electric-power-supply-terminal circuit is stopped by the operation stopping means, the erroneous operation resistance to the external noise in the integrated circuit apparatus can be further improved, and the occurrence of noise generation in the integrated circuit apparatus can be further reduced.
It is also preferred that the integrated circuit apparatus further comprises a group of operation circuits, to which an operation signal or an operation source is supplied to operate the group of operation circuits with each other, which is connected with the most-adjacent-to-electric-power-supply-terminal circuit or the group of most-adjacent-to-electric-power-supply-terminal circuits, wherein an operation of a second circuit connected with the most-adjacent-to-electric-power-supply-terminal circuit or the group of most-adjacent-to-electric-power-supply-terminal circuits or an operation of the group of operation circuits is stopped by the operation stopping means in cases where each of the most-adjacent-to-electric-power-supply-terminal circuit and the second circuit or the group of operation circuits is not used.
In the above configuration, because the operation of the second circuit or the operation of the group of operation circuits is additionally stopped by the operation stopping means, the erroneous operation resistance to the external noise in the integrated circuit apparatus can be further improved, and the occurrence of noise generation in the integrated circuit apparatus can be further reduced.
It is also preferred that the integrated circuit apparatus further comprises one or more second circuits, which are arranged along or are connected with a power supply line extending from the most-adjacent-to-electric-power-supply-terminal circuit to a third circuit from which noise is not output to the electric power supply terminal and to which external noise received from the electric power supply terminal is not input; and one or more first groups of operation circuits, each group of which receive an operation signal or an operation source to operate circuits of the group with each other and which are arranged along or are connected with a power supply line extending from the group of most-adjacent-to-electric-power-supply-terminal circuits to a second group of operation circuits from which noise is not output to the electric power supply terminal and to which external noise received from the electric power supply terminal is not input, wherein an operation of the second circuits or an operation of the first groups of operation circuits is stopped by the operation stopping means in case of non-use of the second circuits or in case of non-use of the first groups of operation circuits.
In the above configuration, because the operation of the second circuits or the operation of the first groups of operation circuits is additionally stopped by the operation stopping means, the erroneous operation resistance to the external noise in the integrated circuit apparatus can be further improved, and the occurrence of noise generation in the integrated circuit apparatus can be further reduced.
It is also preferred that the integrated circuit apparatus further comprises a second circuit, which is not used to stop the operation of the most-adjacent-to-electric-power-supply-terminal circuit or the operation of the group of most-adjacent-to-electric-power-supply-terminal circuits, wherein an operation of the second circuit is stopped by the operation stopping means in case of non-use of the second circuit.
In the above configuration, because the operation of the second circuit is additionally stopped by the operation stopping means, the erroneous operation resistance to the external noise in the integrated circuit apparatus can be further improved, and the occurrence of noise generation in the integrated circuit apparatus can be further reduced.
It is also preferred that the operation stopping means interrupts the supply of an operation clock signal to the most-adjacent-to-electric-power-supply-terminal circuit to stop the operation of the most-adjacent-to-electric-power-supply-terminal circuit.
Therefore, the operation stopping means having a simplified configuration can be obtained.
It is also preferred that the integrated circuit apparatus further comprises a decoder for setting a first selection signal, which corresponds to a first circuit to be used, to an active state, in cases where an address corresponding to the first circuit is received, and setting a second selection signal, which corresponds to a second circuit not to be used, to an inactive state, wherein an operation of the second circuit is stopped by the operation stopping means according to the second selection signal set to the inactive state.
In the above configuration, the first circuit to be used and the second circuit not to be used can be distinguished from each other by adding only the decoder as an additional circuit.
It is also preferred that the most-adjacent-to-electric-power-supply-terminal circuit, of which the operation is stopped by the operation stopping means in case of non-use, has a function of which a use frequency is low.
Therefore, the ease of use of the integrated circuit apparatus and the flexibility of the operation of the integrated circuit apparatus can be maintained, and a possibility that the integrated circuit apparatus is erroneously operated in a high speed operation can be reduced.
It is also preferred that the integrated circuit apparatus further comprises a capacitor, which is arranged between the most-adjacent-to-electric-power-supply-terminal circuit and another circuit, wherein an inductance and a capacitance parasitically exist in the power supply line.
In the above configuration, because an LC filter effect can be obtained from a capacitance of the capacitor and the inductance and the capacitance parasitically existing in the power supply line, even though noise is produced in the integrated circuit apparatus or external noise is input to the integrated circuit apparatus, the noise or the external noise can be reliably reduced according to the LC filter effect, so that a noise reducing characteristic of the integrated circuit apparatus can be obtained.